Modern communication systems, such as cellular communication systems, utilize laterally diffused MOS transistors (LDMOS) as power amplifiers. LDMOSs have high voltage handling capacity made possible by the lightly doped drain (LDD) between the drain contact and the active channel. The LDD increases breakdown voltage at the expense of increased drain resistance. Extending the gate or drain electrode over the LDD decreases the drain resistance but increases the gate-drain and gate-source capacitances. Modern RF LDMOSs add a separate shield electrode (e.g., dummy gate or field plate) above the LDD to improve the drain resistance and decrease gate-drain capacitance, as in U.S. Patent Publication No. 2005/0280087A1 to Babcock et al., the entirety of which is hereby incorporated by reference herein. The shield electrode improves RF performance by acting as a shield between the gate and drain, thereby reducing the gate-drain capacitance and its associated Miller effect. In most cases, the shield electrode is connected to the source. In cases where the shield electrode is isolated from the source, the drain resistance can be further decreased by applying a positive bias on the shield electrode, without affecting the breakdown voltage significantly.
Modern communication systems employ complex modulation schemes to achieve high data rates within a limited bandwidth. These techniques result in significant variation in the envelope of the transmitted signal. Even with modulation schemes where the information is only embedded in the phase of the carrier, like QPSK and OFDM, the limited bandwidth of the transmitting system leads to variations in the envelope of the signal. The high peak-to-average ratio is a problem for the efficient operation of power amplifiers described above, which have to operate at reduced power levels in order to transmit the peak signals with acceptable linearity.
Several approaches have been proposed for dealing with the problem of low power amplifier efficiency due to high peak-to-average ratios. Amongst the most common of these approaches are the Doherty amplifier, Chireix's out phasing, envelope elimination and restoration, and adaptive bias techniques. With adaptive bias, the drain supply voltage continuously tracks the envelope of the incoming signal so that a low drain voltage is used at low power levels, thereby maintaining a higher average efficiency. This has been demonstrated in analog fashion, where a peak detected signal coupled from the input is suitably amplified and applied to the drain. Adaptive bias can also be done using DSP techniques, where the base-band processor directly controls the supply voltage. As an alternative to continuous voltage tracking, the drain supply can be switched to a higher supply unit at the onset of a peak signal. Adaptive biasing on the gate has also been implemented and has been used to enhance linearity, or fine tune a Doherty amplifier.
U.S. Pat. No. 5,898,198 discloses a RF power device having a positive voltage on the shielding electrode. This positive voltage reduces the on-resistance and leads to increases in the output power and maximum efficiency of the LDMOS. However, increasing the shielding electrode voltage with the drain voltage fixed at its typical quiescent value of 28V leads to a faster degradation of the on-resistance. The on-resistance degrades at a faster rate as the shielding electrode voltage is increased.
There remains a need for power amplifiers with improved performance and degradation characteristics.